| Project Settings |
|---|
| Project Name | proj_1 | Device Name | impl_1: Lattice LAV-AT : LAV_AT_E70 |
| Implementation Name | impl_1 | Top Module | led |
| Pipelining | 1 | Retiming | 0 |
| Resource Sharing | 1 | Fanout Guide | 1000 |
| Disable I/O Insertion | 0 | Disable Sequential Optimizations | 0 |
| Clock Conversion | 0 | FSM Compiler | 1 |
| Run Status |
|---|
| Job Name |
Status |
|
|
|
CPU Time |
Real Time |
Memory |
Date/Time |
| (compiler) | Complete |
147 |
0 |
0 |
- |
00m:05s |
- |
2/9/2026
10:40 AM |
| (premap) | Complete |
7 |
1 |
0 |
0m:04s |
0m:04s |
251MB |
2/9/2026
10:40 AM |
| (fpga_mapper) | Complete |
8 |
2 |
0 |
0m:08s |
0m:08s |
363MB |
2/9/2026
10:40 AM |
| Multi-srs Generator |
Complete | | | | | | | 2/9/2026
10:40 AM |
| Area Summary |
|---|
|
| Register bits | 28 |
I/O cells | 18 |
| Block RAMs
(v_ram) | 0 |
LUTs
(total_luts) | 22 |
| Timing Summary |
|---|
|
| Clock Name | Req Freq | Est Freq | Slack |
|---|
| led|osc_clk | 200.0 MHz | 271.7 MHz | 1.319 |
| System | 200.0 MHz | NA | NA |
| Optimizations Summary |
|---|
| Combined Clock Conversion | 1 / 0 |
| |
|